Segment descriptor
From Infogalactic: the planetary knowledge core
In memory addressing for Intel x86 computer architectures, segment descriptors are a part of the segmentation unit, used for translating a logical address to a linear address. Segment descriptors describe the memory segment referred to in the logical address.[1] The segment descriptor (8 bytes long in 80286) contains the following fields:[2]
- A segment base address
- The segment limit which specifies the segment size
- Access rights byte containing the protection mechanism information
- Control bits
x86-64
In X86-64, the code segment descriptor has the following form:[3]
31 | 24 | 23 | 22 | 21 | 20 | 19 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 0 | |||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Base Address[31:24] | G | D | L | A V L | Segment Limit[19:16] | P | DPL | 1 | 1 | C | R | A | Base Address[23:16] | |||||||
Base Address[15:0] | Segment Limit[15:0] |
Where the fields stand for:
- Base Address
- 32 bit starting memory address of the segment
- Segment Limit
- 20 bit length of the segment. How exactly this should be interpreted depends on other bits of the segment descriptor.
- DPL
- descriptor-privilege level
See also
References
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Further reading
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External links
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