File:CMOS NAND Layout.svg
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Original file (SVG file, nominally 294 × 587 pixels, file size: 12 KB)
Summary
The physical layout of a NAND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors. The two smaller regions on the left are taps to prevent latchup. The physical layout of a CMOS NAND.
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File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 18:51, 5 January 2017 | | 294 × 587 (12 KB) | 127.0.0.1 (talk) | The physical layout of a NAND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors. The two smaller regions on the left are taps to prevent latchup. The physical layout of a CMOS NAND. |
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